Location: Bengaluru, India
Role: Power Architecture Engineer
We are seeking a talented engineer to join our Power Architecture Group, responsible for the complete power lifecycle across NVIDIA products. This includes ASIC power analysis, architecture, low-power design, verification, power-aware methodologies, silicon bring-up, and post-silicon correlation.
What You will Be Doing:
- Develop and verify power estimation models/tools for current and next-gen NVIDIA products.
- Architect and design system-level power features to optimize dynamic and leakage power for various use cases.
- Contribute to power-aware verification: create test plans, write test cases, build verification components (monitors, assertions, coverage points), and ensure convergence across RTL, gate-level, and silicon.
- Validate power features on silicon and contribute to Performance/Watt optimization efforts.
- Drive energy efficiency innovation across NVIDIAs product portfolio.
What We are Looking For:
- B.Tech/M.Tech with 1+ years of experience in power-related domains: power analysis, low power design, verification, UPF, and correlation.
- Strong grasp of transistor-level power characteristics (leakage and dynamic), digital design, and Verilog.
- Familiar with low-power techniques: clock gating, power gating, multi-VT, voltage islands, DVFS.
- Experience with power estimation methods and tools.
- Working knowledge of power intent formats (UPF/CPF).
- Exposure to tools like VCLP/CLP for static checks, and VCS-NLP or similar for dynamic verification.
Bonus Points (Preferred):
- Strong debugging and analytical skills.
- Proficient in Python or other OOP languages.
- Familiarity with power analysis tools (PTPX, EPS) or lab-based power measurement setups (e.g., DAQ, oscilloscopes).
- Effective communicator and collaborative team player.