Architect – CPU Cache

AMD

US
  • Full Time

To apply for this job please visit careers.amd.com.

Job Summary:

AMD’s Cores Organization is at the heart of the company’s server, client, and gaming platforms, delivering industry-leading CPUs and cache technologies. We are seeking a Fellow-level Design Engineer with deep expertise in CPU performance modeling, microarchitecture development, and performance analysis to help shape AMD’s next-generation cores and cache architectures.

In this highly technical leadership role, you will act as a technical authority, driving innovation, mentoring engineers, and influencing the architectural direction of future AMD processors.

Key Responsibilities:

  • Collaborate with a focused team of hardware and software engineers to optimize CPU, cache, and interconnect performance

  • Design, develop, and enhance cycle-accurate simulators for cores, caches, and SoCs

  • Build and maintain performance simulators at multiple abstraction levels

  • Apply simulation, analytical modeling, emulation, and post-silicon performance analysis to evaluate and improve microarchitecture designs

  • Develop and refine tools, methodologies, and workflows for workload performance analysis

  • Identify and propose innovative solutions to push processor performance beyond existing limits

  • Provide technical leadership and mentorship to junior engineers

  • Work cross-functionally with global teams to ensure project success and timely delivery

Required Skills & Qualifications:

  • Strong analytical, problem-solving, and critical-thinking abilities

  • Proven experience challenging conventional designs to deliver high-performance CPU solutions

  • Excellent verbal and written communication skills

  • Ability to work independently on long-term, complex engineering programs

  • Strong collaboration skills in a cross-site, multidisciplinary environment

Preferred Experience:

  • Advanced C++ programming and scripting skills

  • Strong background in computer architecture, including CPUs, caches, and interconnects

  • Experience with RTL design, Verilog HDL, and software development

  • Hands-on experience writing, debugging, and validating RTL

  • Demonstrated success working with diverse engineering teams across hardware and software domains

Education & Experience:

  • BS / MS / PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field

  • 10+ years of industry experience in hardware or microarchitecture design

Job Overview